Month: September 2018

Bruce Schneier posts a link to a NIST draft document on IoT cybersecurity; here is a direct link to the document.

AnandTech reports here on Arm’s announcement of its new initiative on safety-ready processors and tools.

Phil Koopman’s excellent blog provides here a list of recent automotive software defects that result in safety problems.

McAfee reports here on a security vulnerability in an IoT smart plug.  Thanks to schneier.com for their article on this subject.

Tom’s Hardware reports here on a vulnerability of the keyless entry system used by Tesla; the same vulnerability may be exhibited by other cars as well.

Extremetech reports here on Samsung’s updated semiconductor manufacturing plans.  This article provides a great deal of useful information and analysis.  Unfortunately, it also says “That leaves just three companies…competing for future semiconductor designs.”

Not the case, guys.  It just leaves three competitors for those next-node designs.  And, in fact, very few customers manufacturing volume required to justify the design effort and expense required to create chips at bleeding edge nodes such as 7 nm.

The semiconductor market is maturing.  That isn’t all bad.  It just requires new ways of thinking.

First, remember that shrinking feature sizes in recent years have not led to advances in other critical requirements. Clock frequencies are flat or modestly improving.  Achieving even those clock rates requires difficult design techniques with many clocking domains and globally asynchronous, locally synchronous (GALS) architectures.  Leakage current keeps going up, pushing more and more power out the tailpipe.  Thermal limitations compound these power consumption woes.

Other manufacturing capabilities are important in many markets.  Xilinx recently announced a system FPGA targeted at wireless applications.  On-board gigahertz-class analog/digital converters allow more of the radio block diagram to be put in logic and software. Having those converters integrated on the same chip with logic reduces the cost of the chip.  Building those converters on a digital process constitutes a significant engineering feat.

Not all semiconductor innovation comes from shrinking transistors—the design space is much larger than that.  Semiconductor manufacturers who choose not to follow the Incredible Shrinking Feature path still have lots of room to innovate and create exciting, new products.

Extremetech reports here that Underwriters Laboratories (UL) has delisted some Huawei benchmarks on the Honor Play device due to the use of a non-standard mode during testing.